There are 16 entries in this glossary.
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Term Definition
Ball Grid Array
A type of memory chip with solder balls on the underside for mounting. Use of BGA allows die package size to be reduced because there is more surface area for attachment. Smaller packaging allows more components to be mounted on a module, making greater densities available. The smaller package also improves heat dissipation for better performance. See CSP and FBGA.
A measure of the capacity of data that can be moved between two points in a given period of time
1. A slot or group of slots that must be populated with modules of like capacity in order to fulfill the data width requirement of the CPU 2. A segment of memory on a module, sometimes also referred to as a row. Modules are either single or dual banked 3. An internal logic segment in a memory component. For example, a 64Mb SDRAM has 4 banks.
Bank Schema
A method of diagramming memory configurations. The bank schema system consists of rows and columns that represent memory sockets on a system: rows indicate independent sockets and columns represent banks of sockets
Burst EDO is a variant on EDO DRAM in which read or write cycles are batched in bursts of four. Burst EDO bus speeds range from 40MHz to 66MHz, as opposed to the 33MHz bus speeds that can be accomplished using fast page mode or EDO DRAM.
See Ball Grid Array
Bill of Materials
Build of Materials (BOM); list of raw materials, sub assemblies, intermediate assemblies, sub-components, components.
Numbering system based on two digits: 0 and 1.
Basic input/output system. Often referred to as CMOS, the BIOS provides an interface for a computer's hardware and software. The BIOS configuration determines how your hardware is accessed.
Binary digit. The smallest piece of data (a 1 or a 0) that a computer recognizes.
A physical unit of information in a logical record. Block size is usually expressed in bytes.
Block Diagram
A circuit or system drawing concerned with major functions and interconnections between functions.
Buffered Memory
A buffer isolates the memory from the controller to minimize the load on the chip set. It is typically used when the system has a high density of memory and/or when a system has more than 3 memory module sockets.
The process of exercising an integrated circuit at elevated voltage and temperature. This process accelerates failures normally seen as "infant mortality" in a chip. (Those chips that would fail early during actual usage will fail during burn-in. Those that pass have a life expectancy much greater than that required for normal usage.)
Circuitry that is used to move data